Senior Lecturer
Computer Architecture Department (DAC),
Universitat Politècnica de Catalunya (UPC)

Email: teresa@ac.upc.edu

Address: Campus Diagonal Nord, UPC
Jordi Girona , 1-3,
08034, Barcelona, Spain

ABOUT ME

Teresa Monreal Arnal received the MS degree in Mathematics and the PhD degree in Computer Science from the University of Zaragoza, Spain, in 1991 and 2003, respectively. Until 2007, she was with the Informática e Ingeniería de Sistemas Department (DIIS) at the University of Zaragoza, Spain. Currently, she is an Associate Professor with the Computer Architecture Department (DAC) at the Universitat Politècnica de Catalunya (UPC), Spain. Her research interests include processor microarchitecture, memory hierarchy, and parallel computer architecture. She collaborates actively with the Grupo de Arquitectura de Computadores from the University of Zaragoza (gaZ).

PUBLICATIONS
45 entries « 9 of 9 »

0000

Journal Articles

Monreal, Teresa; González, Antonio; Viñals, Víctor; Valero, Mateo

Liberación anticipada de registros Journal Article

In: XI Jornadas de Paralelismo. Granada, pp. 11–13, 0000.

BibTeX

Monreal, Teresa; Viñals, Víctor; González, Antonio; Valero, Mateo

Early Register Release Journal Article

In: 0000.

BibTeX

Arnal, Teresa Monreal; Yúfera, Víctor Viñals

A Tiled Cache Organization Journal Article

In: 0000.

BibTeX

Gracia, Darío Suárez; Arnal, Teresa Monreal; Yúfera, Víctor Vinals

Improving performance by merging cache levels Journal Article

In: 0000.

BibTeX

Monreal, T; Gonzalez, A; Valero, M; Viñals, V

Registros Virtuales Journal Article

In: 0000.

BibTeX

45 entries « 9 of 9 »