PhD student

Email: alcolea@unizar.es

Address: Campus Río Ebro, University of Zaragoza
C/María de Luna 1, Ada Byron Building,
50018, Zaragoza, Spain

ABOUT ME

I am a PhD student at the Computer Architecture Group (gaZ) at the University of Zaragoza under the supervision of Javier Resano, where I am working on the development of hardware support for DNNs.

Before that, I graduated in Social Work from the University of Zaragoza, Spain (2010), I obtained my master degree in International Peace, Conflict and Development Studies from the University Jaume I of Castellón, Spain (2012), and then I graduated in Informatics Engineering from the University of Zaragoza, Spain (2017).

Current research

Our research is mainly focused on the development of efficient accelerators for Machine Learning techniques on Embedded Systems. Our main target application has been on-board classification of Hyperspectral Images (HI).

PUBLICATIONS
6 registros « 1 de 2 »

2021

Artículos de revista

Alcolea, Adrián; Resano, Javier

FPGA Accelerator for Gradient Boosting Decision Trees Artículo de revista

En: Electronics, vol. 10, no 3, pp. 314, 2021.

BibTeX

2020

Artículos de revista

Alcolea, Adrián; Paoletti, Mercedes E; Haut, Juan M; Resano, Javier; Plaza, Antonio

Inference in supervised spectral classifiers for on-board hyperspectral imaging: An overview Artículo de revista

En: Remote Sensing, vol. 12, no 3, pp. 534, 2020.

BibTeX

Haut, Juan M; Alcolea, Adrian; Paoletti, Mercedes E; Plaza, Javier; Resano, Javier; Plaza, Antonio

GPU-Friendly Neural Networks for Remote Sensing Scene Classification Artículo de revista

En: IEEE Geoscience and Remote Sensing Letters, 2020.

BibTeX

Moreno, Adrián Alcolea; Olivito, Javier; Resano, Javier; Mecha, Hortensia

Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems Artículo de revista

En: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no 9, pp. 1993–2003, 2020.

BibTeX

2018

Artículos de revista

Moreno, Adrián Alcolea; Olivito, Javier; Resano, Javier

An Efficient Hardware Accelerator to Handle Compressed Filters and Avoid Useless Operations in CNNs Artículo de revista

En: Jornada de Jóvenes Investigadores del I3A, vol. 6, 2018.

BibTeX

6 registros « 1 de 2 »