Email: jalastru@unizar.es

Address: Campus Río Ebro, University of Zaragoza
C/María de Luna 1, Ada Byron Building,
50018, Zaragoza, Spain

ABOUT ME

Jesús Alastruey Benedé is a Telecommunications Engineer, specializing in Communications, and holds a PhD from the University of Zaragoza (UZ, 1997 and 2009). Since 1999 he has been a professor in the area of Computer Architecture and Technology in the Department of Computer Science and Systems Engineering at the University of Zaragoza, currently as an associate professor. Professor Alastruey is a member of the Computer Architecture research group of the University of Zaragoza (gaZ), and of the Aragon Institute of Engineering Research (I3A). The gaZ participates in the European Network of Excellence HiPEAC and is recognized as a consolidated research group by the Government of Aragon.

Prof. Alastruey has advised a Ph.D thesis and has been a member of the research team in 7 consecutive projects of the National Plan. Some of his work has been published in high impact journals and in prestigious conferences in the area of Computer Architecture. His interests include processor design, performance oriented cache memory hierarchy, high performance programming for parallel architectures and energy saving techniques for multiprocessor chips.

Professor Alastruey’s official profile can be found at:
https://janovas.unizar.es/sideral/CV/jesus-alastruey-benede
And his web page address is:
http://webdiis.unizar.es/u/chus/

PUBLICATIONS
39 registros « 4 de 8 »

2018

Artículos de revista

Ferrerón, Alexandra; Alastruey-Benedé, Jesús; Suárez-Gracia, Darío; Karpuzcu, Ulya R

AISC: Approximate Instruction Set Computer Artículo de revista

En: arXiv preprint arXiv:1803.06955, 2018.

BibTeX

Herruzo, Jose Manuel; Navarro, Sonia González; Ibánez, Pablo; Yufera, Víctor Viíals; Alastruey, Jesús; Plata, Oscar

Accelerating Sequence Alignments Based on FM-Index Using the Intel KNL Processor Artículo de revista

En: IEEE/ACM transactions on computational biology and bioinformatics, 2018.

BibTeX

2016

Proceedings Articles

Ferrerón, Alexandra; Alastruey, Jesús; Gracía, Dario Suárez; Arnal, Teresa Monreal; Marín, Pablo Enrique Ibáñez; Yúfera, Víctor Viñals

Gestión de contenidos en caches operando a bajo voltaje Proceedings Article

En: XXVI Jornadas de Paralelismo (JP2016): Salamanca, 14-16 septiembre: actas, pp. 497–506, 2016.

BibTeX

2015

Artículos de revista

Ferreron, Alexandra; Suarez-Gracia, Dario; Alastruey-Benede, Jesus; Monreal-Arnal, Teresa; Ibanez, Pablo

Concertina: Squeezing in cache content to operate at near-threshold voltage Artículo de revista

En: IEEE Transactions on Computers, vol. 65, no 3, pp. 755–769, 2015.

BibTeX

Proceedings Articles

Mikkelsen, Carl Christian Kjelgaard; Alastruey-Benedé, Jesús; Ibáñez-Marín, Pablo; Risueño, Pablo García

Accelerating sparse arithmetic in the context of newton’s method for small molecules with bond constraints Proceedings Article

En: International Conference on Parallel Processing and Applied Mathematics, pp. 160–171, Springer 2015.

BibTeX

39 registros « 4 de 8 »