Email: jalastru@unizar.es

Address: Campus Río Ebro, University of Zaragoza
C/María de Luna 1, Ada Byron Building,
50018, Zaragoza, Spain

ABOUT ME

Jesús Alastruey Benedé is a Telecommunications Engineer, specializing in Communications, and holds a PhD from the University of Zaragoza (UZ, 1997 and 2009). Since 1999 he has been a professor in the area of Computer Architecture and Technology in the Department of Computer Science and Systems Engineering at the University of Zaragoza, currently as an associate professor. Professor Alastruey is a member of the Computer Architecture research group of the University of Zaragoza (gaZ), and of the Aragon Institute of Engineering Research (I3A). The gaZ participates in the European Network of Excellence HiPEAC and is recognized as a consolidated research group by the Government of Aragon.

Prof. Alastruey has advised two Ph.D thesis and has been a member of the research team in 8 consecutive projects of the National Plan. Some of his work has been published in high impact journals and in prestigious conferences in the area of Computer Architecture. His interests include processor design, performance oriented cache memory hierarchy, high performance programming for parallel architectures and energy saving techniques for multiprocessor chips.

Professor Alastruey’s official profile can be found at:
https://janovas.unizar.es/sideral/CV/jesus-alastruey-benede
And his web page address is:
http://webdiis.unizar.es/u/chus/

PUBLICATIONS
42 registros « 7 de 9 »

2006

Artículos de revista

Alastruey, Jesús; Briz, José Luis; Ibáñez, Pablo; Viñals, Victor

Software demand, hardware supply Artículo de revista

En: IEEE Micro, vol. 26, no 4, pp. 72–82, 2006.

BibTeX

Proceedings Articles

Alastruey, Jesús; Monreal, Teresa; Viñals, Víctor; Valero, Mateo

Speculative early register release Proceedings Article

En: Proceedings of the 3rd conference on Computing frontiers, pp. 291–302, ACM 2006.

BibTeX

2004

Proceedings Articles

Cortés, Mateo Valero; Benedé, Jesús Alastruey; Monreal, Teresa; Yufera, Víctor Viñals

Limits on Early Relase of Phisical Registers Proceedings Article

En: Computación de altas prestaciones: actas de las XV Jornadas de Paralelismo, Almería, 15, 16 y 17 de septiembre de 2004, pp. 231–236, Servicio de Publicaciones 2004.

BibTeX

2002

Proceedings Articles

Ibáñez, Pablo; Benedé, Jesús Alastruey; Cruz, Oscar Blasco; Yufera, Víctor Viñals; Velasco, José Luis Briz

SPEC CPUy caches en chip: evolución e interacción Proceedings Article

En: XIII Jornadas de Paralelismo: Lleida, 9, 10 y 11 de septiembre de 2002: actas, pp. 19–24, Universitat de Lleida 2002.

BibTeX

1791

Artículos de revista

Serrano-Gracia, María Astón; Kjelgaard-Mikkelsen, Carl Christian; Alastruey-Benedé, Jesús; Ibáñez-Marín, Pablo; García-Risueño, Pablo; Ortín, M; Ramini, L; Tatenguem, H; Viñals, V; Bertozzi, D; others,

Implementació? n de un nuevo algoritmo para imponer ligaduras en Diná? mica Molecular Artículo de revista

En: XXV Jornadas de Paralelismo, vol. 1, pp. 3–10, 1791.

BibTeX

42 registros « 7 de 9 »