PhD student
Email: agusnt@unizar.es
Address: Campus Río Ebro, University of Zaragoza
C/María de Luna 1, Ada Byron Building,
50018, Zaragoza, Spain
ABOUT ME
—
PUBLICATIONS
2023
Journal Articles
Navarro-Torres, Agustín; Alastruey-Benedé, Jesús; Ibáñez, Pablo; Viñals-Yúfera, Víctor
BALANCER: bandwidth allocation and cache partitioning for multicore processors Journal Article
In: The Journal of Supercomputing, pp. 1–25, 2023.
@article{navarro2023balancer,
title = {BALANCER: bandwidth allocation and cache partitioning for multicore processors},
author = {Agustín Navarro-Torres and Jesús Alastruey-Benedé and Pablo Ibáñez and Víctor Viñals-Yúfera},
url = {https://doi.org/10.1007/s11227-023-05070-0},
doi = {10.1007/s11227-023-05070-0},
year = {2023},
date = {2023-01-01},
urldate = {2023-01-01},
journal = {The Journal of Supercomputing},
pages = {1--25},
publisher = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
2022
Proceedings Articles
Navarro-Torres, Agustín; Panda, Biswabandan; Alastruey-Benedé, Jesús; Ibáñez, Pablo; Yúfera, Víctor Viñals; Ros, Alberto
Berti: an Accurate Local-Delta Data Prefetcher Proceedings Article
In: 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, Chicago, IL, USA, October 1-5, 2022, pp. 975–991, IEEE, 2022.
@inproceedings{DBLP:conf/micro/Navarro-TorresP22,
title = {Berti: an Accurate Local-Delta Data Prefetcher},
author = {Agustín Navarro-Torres and Biswabandan Panda and Jesús Alastruey-Benedé and Pablo Ibáñez and Víctor Viñals Yúfera and Alberto Ros},
url = {https://doi.org/10.1109/MICRO56248.2022.00072},
doi = {10.1109/MICRO56248.2022.00072},
year = {2022},
date = {2022-01-01},
booktitle = {55th IEEE/ACM International Symposium on Microarchitecture, MICRO
2022, Chicago, IL, USA, October 1-5, 2022},
pages = {975--991},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
2021
Proceedings Articles
Navarro-Torres, Agustín; Alastruey-Benedé, Jesús; Ibáñez-Marín, Pablo; Carpen-Amarie, Maria
Synchronization Strategies on Many-Core SMT Systems Proceedings Article
In: 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2021, Belo Horizonte, Brazil, October 26-29, 2021, pp. 54–63, IEEE, 2021.
@inproceedings{DBLP:conf/sbac-pad/Navarro-TorresA21,
title = {Synchronization Strategies on Many-Core SMT Systems},
author = {Agustín Navarro-Torres and Jesús Alastruey-Benedé and Pablo Ibáñez-Marín and Maria Carpen-Amarie},
url = {https://doi.org/10.1109/SBAC-PAD53543.2021.00017},
doi = {10.1109/SBAC-PAD53543.2021.00017},
year = {2021},
date = {2021-01-01},
booktitle = {33rd IEEE International Symposium on Computer Architecture and High
Performance Computing, SBAC-PAD 2021, Belo Horizonte, Brazil, October
26-29, 2021},
pages = {54--63},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
2019
Journal Articles
Navarro-Torres, Agustín; Alastruey-Benedé, Jesús; Ibáñez-Marín, Pablo; Viñals-Yúfera, Víctor
Memory hierarchy characterization of SPEC CPU2006 and SPEC CPU2017 on the Intel Xeon Skylake-SP Journal Article
In: PloS one, vol. 14, no. 8, pp. e0220135, 2019.
@article{navarro2019memory,
title = {Memory hierarchy characterization of SPEC CPU2006 and SPEC CPU2017 on the Intel Xeon Skylake-SP},
author = {Agustín Navarro-Torres and Jesús Alastruey-Benedé and Pablo Ibáñez-Marín and Víctor Viñals-Yúfera},
year = {2019},
date = {2019-01-01},
journal = {PloS one},
volume = {14},
number = {8},
pages = {e0220135},
publisher = {Public Library of Science San Francisco, CA USA},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Proceedings Articles
Valero, Alejandro; Gracia, Darío Suárez; Tejero, Ruben Gran; Ramos, Luis M; Navarro-Torres, Agustín; Muñoz, Adolfo; Ezpeleta, Joaquín; Briz, José Luis; Murillo, Ana C; Montijano, Eduardo; others,
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer Proceedings Article
In: Proceedings of the Workshop on Computer Architecture Education, pp. 1–8, 2019.
@inproceedings{valero2019exposing,
title = {Exposing Abstraction-Level Interactions with a Parallel Ray Tracer},
author = {Alejandro Valero and Darío Suárez Gracia and Ruben Gran Tejero and Luis M Ramos and Agustín Navarro-Torres and Adolfo Muñoz and Joaquín Ezpeleta and José Luis Briz and Ana C Murillo and Eduardo Montijano and others},
year = {2019},
date = {2019-01-01},
booktitle = {Proceedings of the Workshop on Computer Architecture Education},
pages = {1--8},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}