Saltar al contenido
Menú
Home
Research lines
TIME-SENSITIVE SYSTEMS AND PERFORMANCE (TSSP)
ON-CHIP NETWORKS AND MEMORY HIERARCHY
MEMORY HIERARCHIES FOR REAL-TIME SYSTEMS
TASK SCHEDULING AND LOAD BALANCING
DESIGN AND OPTIMIZATION OF PERFORMANCE AND ENERGY EFFICIENCY OF APPLICATIONS
Projects
Team
Publications
Repositories
FPGA for GBDT
POLYGAZ
MATRIX TRANSPOSITION
BVSFM
SPARSE ACCELERATOR
TERTIMUSS
News
Regional projects
Grupo de Arquitectura de Computadores de la UZ (T58_20R)
23 enero 2023
por
i3a
