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TIME-SENSITIVE NETWORKING (TSN)
ON-CHIP NETWORKS AND MEMORY HIERARCHY
MEMORY HIERARCHIES FOR REAL-TIME SYSTEMS
TASK SCHEDULING AND LOAD BALANCING
DESIGN AND OPTIMIZATION OF PERFORMANCE AND ENERGY EFFICIENCY OF APPLICATIONS
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PhD Students
Iñigo Gabirondo López
7 May 2025
by
Grupo del I3A
Samuel Pérez Pedrajas
5 May 2025
by
Grupo del I3A
Nicolás Landeros
30 April 2025
30 April 2025
by
Grupo del I3A
Lorién López Villellas
24 April 2025
27 April 2023
by
Grupo del I3A
