Senior Lecturer
Email: imarin@unizar.es
Address: Campus Río Ebro, University of Zaragoza
C/María de Luna 1, Ada Byron Building,
50018, Zaragoza, Spain
ABOUT ME
—
PUBLICATIONS
2006
Journal Articles
Dios, A; Sahelices, B; Ibanez, P; Vinals, V; Llaberia, JM
Topic 7-Parallel Computer Architecture and Instruction Level Parallelism-Speeding-Up Synchronizations in DSM Multiprocessors Journal Article
In: Lecture Notes in Computer Science, vol. 4128, pp. 473–484, 2006.
@article{dios2006topic,
title = {Topic 7-Parallel Computer Architecture and Instruction Level Parallelism-Speeding-Up Synchronizations in DSM Multiprocessors},
author = {A Dios and B Sahelices and P Ibanez and V Vinals and JM Llaberia},
year = {2006},
date = {2006-01-01},
journal = {Lecture Notes in Computer Science},
volume = {4128},
pages = {473--484},
publisher = {Berlin: Springer-Verlag, 1973-},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Sahelices, Benjamín; Pablo, Ibáñez; Víctor, Viñals; Llabería, José María; others,
Speeding-Up Synchronization in DSM Multiprocessors Journal Article
In: 2006.
@article{sahelices2006speeding,
title = {Speeding-Up Synchronization in DSM Multiprocessors},
author = {Benjamín Sahelices and Ibáñez Pablo and Viñals Víctor and José María Llabería and others},
year = {2006},
date = {2006-01-01},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Proceedings Articles
Dios, A De; Sahelices, B; Ibáñez, Pablo; Viñals, Víctor; Llabería, José M
Speeding-up synchronizations in dsm multiprocessors Proceedings Article
In: European Conference on Parallel Processing, pp. 473–484, Springer 2006.
@inproceedings{de2006speeding,
title = {Speeding-up synchronizations in dsm multiprocessors},
author = {A De Dios and B Sahelices and Pablo Ibáñez and Víctor Viñals and José M Llabería},
year = {2006},
date = {2006-01-01},
booktitle = {European Conference on Parallel Processing},
pages = {473--484},
organization = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
2005
Proceedings Articles
Torres, Enrique F; Ibánez, Pablo; Viñals, Víctor; Llabería, José María
Store buffer design in first-level multibanked data caches Proceedings Article
In: 32nd International Symposium on Computer Architecture (ISCA’05), pp. 469–480, IEEE 2005.
@inproceedings{torres2005store,
title = {Store buffer design in first-level multibanked data caches},
author = {Enrique F Torres and Pablo Ibánez and Víctor Viñals and José María Llabería},
year = {2005},
date = {2005-01-01},
booktitle = {32nd International Symposium on Computer Architecture (ISCA'05)},
pages = {469--480},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
2004
Proceedings Articles
Torres, Enrique F; Ibañez, Pablo; Viñals, Víctor; Llabería, José María
Contents management in first-level multibanked data caches Proceedings Article
In: European Conference on Parallel Processing, pp. 516–524, Springer 2004.
@inproceedings{torres2004contents,
title = {Contents management in first-level multibanked data caches},
author = {Enrique F Torres and Pablo Ibañez and Víctor Viñals and José María Llabería},
year = {2004},
date = {2004-01-01},
booktitle = {European Conference on Parallel Processing},
pages = {516--524},
organization = {Springer},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}