Senior Lecturer
Email: mvg@unizar.es
Address: Campus Río Ebro, University of Zaragoza
C/María de Luna 1, Ada Byron Building,
50018, Zaragoza, Spain
ABOUT ME
María Villarroya Gaudó obtained her Ph.D. in 2005 at the Department of Electronics Engineering at the Autonoma University of Barcelona. She is an Associate Professor in Computer Architecture and Technology in the Department of Computer and Systems Engineering at the Universidad de Zaragoza. Her research interests include memory hierarchy and heterogeneous systems. Dr. Vilarroya-Gaudó is member of the Aragon Institute of Engineering Research (I3A), the Spanish Society of Computer Architecture (SARTECO).
PUBLICATIONS
2022
Proceedings Articles
Gracia, Darío Suárez; Valero, Alejandro; Tejero, Rubén Gran; Villarroya-Gaudó, María; Viñals, Víctor
peRISCVcope: A Tiny Teaching-Oriented RISC-V Interpreter Proceedings Article
In: Proceedings of the 37th Conference on Design of Circuits and Integrated Circuits (DCIS 2022), pp. 1-6, 2022, ISBN: 978-1-6654-5950-1.
@inproceedings{Gracia2022,
title = {peRISCVcope: A Tiny Teaching-Oriented RISC-V Interpreter},
author = {Darío Suárez Gracia and Alejandro Valero and Rubén Gran Tejero and María Villarroya-Gaudó and Víctor Viñals},
url = {https://ieeexplore.ieee.org/document/9970050},
doi = {https://doi.org/10.1109/DCIS55711.2022.9970050},
isbn = {978-1-6654-5950-1},
year = {2022},
date = {2022-11-16},
urldate = {2022-11-16},
booktitle = {Proceedings of the 37th Conference on Design of Circuits and Integrated Circuits (DCIS 2022)},
pages = {1-6},
abstract = {The fast advances of computer systems translate into a growing demand of methodologies and tools to introduce those novelties into classes. Among the plethora of those advances, virtualization has become an essential technology in almost every relevant system stack, from connected cars to hyperscaled cloud servers. However, introducing those technologies into the classroom remains a challenging task because of the huge complexity of their software components that may hinder the learning process of students. peRISCVcope aims to help in this area by proposing a tiny yet powerful interpreter to dig into virtualization technologies, such as the implementation of trap&emulate hypervisors. With less than 2,000 lines of code, and thanks to the conciseness of the RV32I base instruction set of RISC-V, peRISCVcope enables students to make virtualization knowledge their own. This paper presents our experiences developing and testing a virtualization laboratory where students implement parts of an interpreter. After the practical experience, peRISCVcope has been proved as a useful pedagogical tool, and, most importantly, students have positively rated the experience.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
2019
Journal Articles
Guzman, Maria Angelica Davila; Nozal, Raúl; Tejero, Rubén Gran; Villarroya-Gaudó, María; Gracia, Darío Suárez; Bosque, Jose Luis
Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL Journal Article
In: The Journal of Supercomputing, vol. 75, no. 3, pp. 1732–1746, 2019.
@article{guzman2019cooperative,
title = {Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL},
author = {Maria Angelica Davila Guzman and Raúl Nozal and Rubén Gran Tejero and María Villarroya-Gaudó and Darío Suárez Gracia and Jose Luis Bosque},
year = {2019},
date = {2019-01-01},
journal = {The Journal of Supercomputing},
volume = {75},
number = {3},
pages = {1732--1746},
publisher = {Springer US},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Workshops
Valero, Alejandro; Gracia, Darío Suárez; Tejero, Ruben Gran; Ramos, Luis M.; Navarro-Torres, Agustín; Muñoz, Adolfo; Ezpeleta, Joaquín; Briz, José Luis; Murillo, Ana C.; Montijano, Eduardo; Resano, Javier; Villarroya-Gaudó, María; Alastruey-Benedé, Jesús; Torres, Enrique F.; Álvarez, Pedro; Ibáñez, Pablo; Viñals, Víctor
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer Workshop
Proceedings of the Workshop on Computer Architecture Education, WCAE@ISCA 2019, Phoenix, AZ, USA, June 22, 2019, ACM, 2019.
@workshop{DBLP:conf/wcae/ValeroGTRNMEBMM19,
title = {Exposing Abstraction-Level Interactions with a Parallel Ray Tracer},
author = {Alejandro Valero and Darío Suárez Gracia and Ruben Gran Tejero and Luis M. Ramos and Agustín Navarro-Torres and Adolfo Muñoz and Joaquín Ezpeleta and José Luis Briz and Ana C. Murillo and Eduardo Montijano and Javier Resano and María Villarroya-Gaudó and Jesús Alastruey-Benedé and Enrique F. Torres and Pedro Álvarez and Pablo Ibáñez and Víctor Viñals},
url = {https://doi.org/10.1145/3338698.3338886},
doi = {10.1145/3338698.3338886},
year = {2019},
date = {2019-01-01},
urldate = {2019-01-01},
booktitle = {Proceedings of the Workshop on Computer Architecture Education, WCAE@ISCA
2019, Phoenix, AZ, USA, June 22, 2019},
pages = {5:1--5:8},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {workshop}
}
2018
Journal Articles
Guzmán, Maria Angélica Dávila; Gran, Rubén; Villarroya-Gaudó, María; Súarez-Gracia, Darío
Planificadores para sistemas heterogéneos formados por CPUs, GPUs y FPGAs Journal Article
In: Jornada de Jóvenes Investigadores del I3A, vol. 6, 2018.
@article{guzman2018planificadores,
title = {Planificadores para sistemas heterogéneos formados por CPUs, GPUs y FPGAs},
author = {Maria Angélica Dávila Guzmán and Rubén Gran and María Villarroya-Gaudó and Darío Súarez-Gracia},
year = {2018},
date = {2018-01-01},
journal = {Jornada de Jóvenes Investigadores del I3A},
volume = {6},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Proceedings Articles
Dávila, Maria Angélica; Tejero, Rubén Gran; Villarroya-Gaudó, María; Suáres-Gracia, Darío
Caracterización de una FPGA sobre un sistema heterogéneo usando OpenCL Proceedings Article
In: XXIX Jornadas de Paralelismo (SARTECO), pp. 5, 2018.
@inproceedings{davila2018caracterizacion,
title = {Caracterización de una FPGA sobre un sistema heterogéneo usando OpenCL},
author = {Maria Angélica Dávila and Rubén Gran Tejero and María Villarroya-Gaudó and Darío Suáres-Gracia},
year = {2018},
date = {2018-01-01},
booktitle = {XXIX Jornadas de Paralelismo (SARTECO)},
pages = {5},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}