Senior Lecturer
Computer Architecture Department (DAC),
Universitat Politècnica de Catalunya (UPC)
Email: teresa@ac.upc.edu
Address: Campus Diagonal Nord, UPC
Jordi Girona , 1-3,
08034, Barcelona, Spain
ABOUT ME
Teresa Monreal Arnal received the MS degree in Mathematics and the PhD degree in Computer Science from the University of Zaragoza, Spain, in 1991 and 2003, respectively. Until 2007, she was with the Informática e Ingeniería de Sistemas Department (DIIS) at the University of Zaragoza, Spain. Currently, she is an Associate Professor with the Computer Architecture Department (DAC) at the Universitat Politècnica de Catalunya (UPC), Spain. Her research interests include processor microarchitecture, memory hierarchy, and parallel computer architecture. She collaborates actively with the Grupo de Arquitectura de Computadores from the University of Zaragoza (gaZ).
PUBLICATIONS
2015
Journal Articles
Ferreron, Alexandra; Suarez-Gracia, Dario; Alastruey-Benede, Jesus; Monreal-Arnal, Teresa; Ibanez, Pablo
Concertina: Squeezing in cache content to operate at near-threshold voltage Journal Article
In: IEEE Transactions on Computers, vol. 65, no. 3, pp. 755–769, 2015.
@article{ferreron2015concertina,
title = {Concertina: Squeezing in cache content to operate at near-threshold voltage},
author = {Alexandra Ferreron and Dario Suarez-Gracia and Jesus Alastruey-Benede and Teresa Monreal-Arnal and Pablo Ibanez},
year = {2015},
date = {2015-01-01},
journal = {IEEE Transactions on Computers},
volume = {65},
number = {3},
pages = {755--769},
publisher = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Proceedings Articles
Maag, Javier Díaz; Arnal, Teresa Monreal; Yúfera, Víctor Viñals; Marín, Pablo Enrique Ibáñez; Griño, José María Llaberia
Selección de contenidos basada en reuso para caches compartidas en exclusión Proceedings Article
In: XXVI edición de las Jornadas de Paralelismo (JP2015): 23, 24 y 25 de septiembre de 2015 Córdoba: actas, pp. 433–442, 2015.
@inproceedings{diaz2015seleccion,
title = {Selección de contenidos basada en reuso para caches compartidas en exclusión},
author = {Javier Díaz Maag and Teresa Monreal Arnal and Víctor Viñals Yúfera and Pablo Enrique Ibáñez Marín and José María Llaberia Griño},
year = {2015},
date = {2015-01-01},
booktitle = {XXVI edición de las Jornadas de Paralelismo (JP2015): 23, 24 y 25 de septiembre de 2015 Córdoba: actas},
pages = {433--442},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
2014
Journal Articles
Gracia, Darío Suárez; Ferrerón, Alexandra; Campo, Luis Montesano Del; Arnal, Teresa Monreal; Yúfera, Víctor Viñals
Revisiting LP-NUCA Energy Consumption: Cache Access Policies and Adaptive Block Dropping Journal Article
In: ACM Transactions on Architecture and Code Optimization (TACO), vol. 11, no. 2, pp. 19, 2014.
@article{gracia2014revisiting,
title = {Revisiting LP-NUCA Energy Consumption: Cache Access Policies and Adaptive Block Dropping},
author = {Darío Suárez Gracia and Alexandra Ferrerón and Luis Montesano Del Campo and Teresa Monreal Arnal and Víctor Viñals Yúfera},
year = {2014},
date = {2014-01-01},
journal = {ACM Transactions on Architecture and Code Optimization (TACO)},
volume = {11},
number = {2},
pages = {19},
publisher = {ACM},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
Proceedings Articles
Ferrerón, Alexandra; Suarez-Gracia, Dario; Alastruey-Benedé, Jesús; Monreal, Teresa; Vinals, Victor
Block disabling characterization and improvements in CMPs operating at ultra-low voltages Proceedings Article
In: 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing, pp. 238–245, IEEE 2014.
@inproceedings{ferreron2014block,
title = {Block disabling characterization and improvements in CMPs operating at ultra-low voltages},
author = {Alexandra Ferrerón and Dario Suarez-Gracia and Jesús Alastruey-Benedé and Teresa Monreal and Victor Vinals},
year = {2014},
date = {2014-01-01},
booktitle = {2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing},
pages = {238--245},
organization = {IEEE},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Technical Reports
Gracia, Darío Suárez; Arnal, Teresa Monreal; Yúfera, Víctor Viñals; Ferrerón, Alexandra; Campo, Luis Montesano
Revisiting LP-NUCA Energy Consumption: Cache Access Policies and Adaptive Block Dropping Technical Report
2014.
@techreport{suarez2014revisiting,
title = {Revisiting LP-NUCA Energy Consumption: Cache Access Policies and Adaptive Block Dropping},
author = {Darío Suárez Gracia and Teresa Monreal Arnal and Víctor Viñals Yúfera and Alexandra Ferrerón and Luis Montesano Campo},
year = {2014},
date = {2014-01-01},
keywords = {},
pubstate = {published},
tppubtype = {techreport}
}